How to read this page. Each section starts Simple, then goes to a Deep dive: stop wherever you have what you need. The small numbers are sources: click one to open the original document. Where the maker has not published a figure -- a price, a die size, a factory address -- this page says so rather than estimate it.
1.At a glance
SimpleStart here
The A100 is a data-centre GPU NVIDIA announced on 14 May 2020, saying it was “in full production and shipping to customers worldwide” the same day 1. It introduced Multi-Instance GPU (MIG), letting one physical chip be split into up to seven independent GPUs.
Deep diveThe technical detail
Codename GA100, architecture Ampere. NVIDIA called it “the world’s largest 7-nanometer processor” at launch 1. Shipped in 40GB and 80GB HBM2e variants, PCIe and SXM form factors 2.
2.Launch and history
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A100 launched into the early stage of the COVID-19 pandemic, and NVIDIA’s own release frames the first DGX A100 as being put directly to work on it: the system was shipped to Argonne National Laboratory for pandemic research 3.
Deep diveThe technical detail
NVIDIA’s DGX A100 release states the system was “immediately available” and that the first unit was delivered to Argonne National Laboratory 3. Cloud launch partners named in NVIDIA’s own release: Alibaba Cloud, AWS, Baidu Cloud, Google Cloud, Microsoft Azure, Oracle and Tencent Cloud 1.
3.What’s inside it
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Three things NVIDIA highlighted at launch 4: 3rd-generation Tensor Cores, a new number format called TF32 that speeds up existing code with no changes, and Multi-Instance GPU (MIG), which splits one A100 into up to seven isolated smaller GPUs.
Deep diveThe technical detail
From NVIDIA’s own GTC 2020 architecture presentation 4:
- 3rd-gen Tensor Cores — “2.5x TOPS” per-SM improvement over V100, across more data types.
- TensorFloat-32 (TF32) — combines “FP32 range” with “precision of FP16,” giving “up to 10x speedup” with no code changes required.
- Multi-Instance GPU (MIG) — partitions one A100 into “up to 7 instances,” each hardware-isolated and independently schedulable.
- Structural sparsity — “2x Tensor Core throughput” via 2:4 fine-grained structured pruning.
4.Full spec table
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6,912 CUDA cores, 3rd-generation Tensor Cores, and either 40GB or 80GB of HBM2e memory depending on the variant 2.
Deep diveThe technical detail
| Spec | A100 PCIe | A100 SXM |
|---|
| Process node | TSMC 7nm (N7) 1 |
|---|
| Transistors | 54+ billion 2 |
|---|
| CUDA cores | 6,912 (108 SMs) 2 |
|---|
| Memory | 40GB or 80GB HBM2e | 40GB or 80GB HBM2e |
|---|
| Memory bandwidth (80GB) | 1,935 GB/s | 2,039 GB/s |
|---|
| TDP | 300 W | 400 W (up to 500W CTS variant) |
|---|
| FP64 | 9.7 TFLOPS |
|---|
| FP64 Tensor Core | 19.5 TFLOPS |
|---|
| FP32 | 19.5 TFLOPS |
|---|
| TF32 Tensor (dense/sparse) | 156 / 312 TFLOPS |
|---|
| BF16/FP16 Tensor (dense/sparse) | 312 / 624 TFLOPS |
|---|
| INT8 Tensor (dense/sparse) | 624 / 1,248 TOPS |
|---|
| NVLink | 600 GB/s, via bridge (2-GPU max) | 600 GB/s, 3rd gen, 12 links (via HGX) |
|---|
| Form factor | PCIe (dual-slot air / single-slot liquid) | SXM (HGX A100 4- or 8-GPU baseboards) |
|---|
All figures per NVIDIA’s own datasheet and GTC presentation 24. Die size (widely reported as 826 mm²) was not confirmed against a primary NVIDIA document in this page’s research pass and is therefore left out of the table.
5.Where it’s made
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A100 was made by TSMC on the 7nm (N7) process 1. NVIDIA designs the chip; it does not operate the factory that manufactures it.
Deep diveThe technical detail
NVIDIA’s own release calls the GA100 die “the world’s largest 7-nanometer processor” 1, confirming both the foundry (TSMC) and the node (7nm/N7). Neither company publishes which specific TSMC fab produced A100 wafers.
6.Which systems use it
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NVIDIA’s own system is DGX A100: 8 chips, 5 petaflops of AI performance, 320GB of total GPU memory 3. The US Department of Energy’s Perlmutter supercomputer at NERSC also runs on A100 5.
Deep diveThe technical detail
DGX A100 combines 8× A100 GPUs for 5 petaflops of AI performance and 320GB total GPU memory 3. HGX A100 4- and 8-GPU baseboards are the OEM building block used by system partners 1. NERSC’s own documentation for Perlmutter states “Four NVIDIA A100 (Ampere) GPUs” per GPU node, with 1,536 nodes using 40GB A100s and 256 nodes using 80GB A100s 5 — a government lab’s own systems page, not a press claim.
7.Official pricing
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NVIDIA has published a system price, not a chip price: DGX A100 “start at $199,000” per NVIDIA’s own release 3. No standalone A100 chip price has been found in NVIDIA’s official materials.
Deep diveThe technical detail
The $199,000 DGX A100 starting price is a direct quote from NVIDIA’s own newsroom release 3 — the clearest official price figure available for any chip on this page. Cloud providers (AWS P4d, Azure NDm A100 v4, Google Cloud A2) publish their own hourly rates for A100 instances on their own pricing pages, which change over time and are not reproduced here.
9.What came before, what came next
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Came before: V100 (Volta architecture). Came after: H100 (Hopper architecture), announced March 2022.
Deep diveThe technical detail
A100 is the direct Ampere-generation successor to V100 (Volta) and was itself succeeded by H100 (Hopper), announced at GTC in March 2022. Both transitions are documented across NVIDIA’s own newsroom releases for each chip.
10.Hidden in plain sight
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The record-setting A100 die launched almost two full years before ChatGPT made NVIDIA data-centre chips a household topic — NVIDIA’s own “world’s largest 7nm processor” claim came and went in relative obscurity outside specialist press 1.
Deep diveThe technical detail
NVIDIA announced A100 in May 2020, calling the GA100 die “the world’s largest 7-nanometer processor” 1. The general public did not treat NVIDIA data-centre GPUs as a mainstream topic until the generative-AI boom that followed ChatGPT’s release in late 2022 — by which point A100 had already been in production for two and a half years and NVIDIA had moved on to H100.