How to read this page. Each section starts Simple, then goes to a Deep dive: stop wherever you have what you need. The small numbers are sources: click one to open the original document. Where the maker has not published a figure -- a price, a die size, a factory address -- this page says so rather than estimate it.
1.At a glance
SimpleStart here
The MI350 series is AMD’s 2025 generation of AI accelerators: MI350X and MI355X, announced 12 June 2025 on a new architecture called CDNA 4, plus MI350P, a plug-in card version for ordinary servers added in May 2026 12.
Deep diveThe technical detail
AMD’s own framing at launch claimed “up to a 4x generation-on-generation AI compute increase” and a “35x generational leap in inferencing” over MI300X 1. A separate AMD blog states a more specific claim: on Llama 3.1 405B inference in FP4, MI355X “delivers up to 40% better tokens-per-dollar than B200”, naming NVIDIA’s B200 directly rather than an unnamed “competing solution” 3. All of these are AMD’s own comparisons, not independently benchmarked.
2.Launch and history
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Three cards, one generation, three different jobs: MI355X is the fastest and hottest-running, built for data centres with liquid cooling. MI350X is the same design run cooler and slower, for data centres without it. MI350P is a smaller, half-size card that slots into an ordinary air-cooled server, no special cooling required.
Deep diveThe technical detail
AMD’s own MI350P blog states its purpose plainly: “dual-slot drop-in cards for standard air-cooled servers”, built “to run enterprise AI on your existing infrastructure” 2 — a deliberate trade-off of raw performance for compatibility with data centres that were never built for 1,000-watt-plus liquid-cooled chips.
3.What’s inside it
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CDNA 4, AMD’s fourth-generation compute architecture, confirmed in AMD’s own ROCm documentation 4.
Deep diveThe technical detail
AMD’s ROCm documentation states plainly: “The AMD Instinct MI350 Series GPUs are based on the AMD CDNA4 architecture” 4. AMD’s MI355X product page lists a transistor count of 185 billion — a figure that appears on the live product page but not in either PDF brochure this page also draws on, so it is reported here with that caveat 5.
4.Full spec table
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MI350X and MI355X each carry 288 GB of HBM3E memory at up to 8 TB/s bandwidth. MI350P carries half that: 144 GB at 4 TB/s 67.
Deep diveThe technical detail
| Spec | MI350X | MI355X | MI350P |
|---|
| Compute units | 256 | 256 | 128 |
|---|
| Memory | 288 GB HBM3E | 288 GB HBM3E | 144 GB HBM3E |
|---|
| Memory bandwidth | 8 TB/s | 8 TB/s | 4 TB/s, 4,096-bit |
|---|
| FP16 matrix | 2.3 PFLOPS, per AMD’s own blog | 2.5166 PFLOPS (brief) / 2.5 PFLOPS (product page, rounded) | 1,150 TFLOPS |
|---|
| FP8 / MXFP8 | not separately confirmed by this page — see note | 5.0332 PFLOPS (10.1 with sparsity) | 2,300 TFLOPS |
|---|
| MXFP4 | 9.2 PFLOPS, per AMD’s own blog | 10.0663 PFLOPS | 4,600 TFLOPS |
|---|
| TDP | 1,000W | 1,400W | 600W (configurable to 450W) |
|---|
| Form factor | OAM | OAM | PCIe CEM card, full-height full-length, dual-slot |
|---|
| Process node | TSMC N3P (compute chiplets) / N6 (I/O chiplets) | TSMC 3nm / 6nm FinFET |
|---|
MI355X figures per AMD’s own product brief, which gives a “peak theoretical performance with sparsity” table 6; AMD’s consumer-facing product page rounds these to MXFP4/MXFP6 10.1 PFLOPS, MXFP8 5 PFLOPS, FP16 matrix 2.5 PFLOPS (5 with sparsity) 5. MI350X’s FP8 figures are not reported here: this page’s own reading of the official MI350X brief returned an apparent extraction error on that row, so rather than publish a possibly wrong number, it is left blank pending a direct re-check of the PDF 8. MI350P figures per AMD’s own product brochure 7.
5.Where it’s made
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MI350X and MI355X: made by TSMC, compute chiplets on the N3P process, input/output chiplets on N6. MI350P: TSMC 3-nanometre and 6-nanometre FinFET 47.
Deep diveThe technical detail
AMD’s own ROCm documentation gives the exact wording for MI350X/MI355X: the compute chiplets are “built on TSMC’s N3P process to take advantage of improved logic density and performance” and the I/O chiplets are “implemented on TSMC’s N6 process” 4. AMD names Samsung as “the primary HBM3E partner” for MI350X and MI355X memory, and separately says the two companies “will align on primary HBM4 supply” for AMD’s next chip, MI455X 9. AMD’s June 2025 launch material also names Micron as an HBM3E supplier at launch, alongside Samsung.
6.Which systems use it
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AMD’s June 2025 launch named Microsoft Azure, Meta, Dell, HPE, Lenovo, Supermicro and Hugging Face as ecosystem partners around the MI350 series 1.
Deep diveThe technical detail
That is partner and ecosystem naming rather than a confirmed list of cloud providers renting MI350-series chips by the hour. Some specialist cloud providers have since listed MI355X for rent, but this page could not directly verify a current, official price from any of them at the time of writing, so none is stated in the pricing section below.
7.Official pricing
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Not published by AMD for any of the three cards. This page could not confirm a reliable, official cloud rental price for MI350X, MI355X or MI350P at the time of writing.
Deep diveThe technical detail
This is a genuine gap rather than an oversight: unlike MI300X and MI325X, which multiple named cloud providers list with a current price on their own pricing pages, this page found no cloud provider’s own official pricing page confirming a current MI350-series rate. A figure for MI355X circulates on at least one specialist GPU-cloud site, but this page could not directly verify it against that provider’s own current pricing page, so it is not repeated here.
9.What came before, what came next
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Came before: MI325X, announced October 2024 10. Came after: the MI455X and the MI400 series, launched into production July 2026.
Deep diveThe technical detail
AMD’s own June 2024 roadmap release first previewed the architecture that became MI350X/MI355X as part of a multi-year plan that already named MI400-series chips as the following generation 11 — a plan AMD then delivered on, launching MI350X/MI355X in June 2025 1 and MI455X in production in July 2026 12.
10.Hidden in plain sight
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MI350P exists specifically because most data centres were never built for chips that draw 1,000 watts or more and need liquid cooling — it trades half the memory and half the compute for a card that fits a normal server rack.
Deep diveThe technical detail
AMD’s own description of MI350P’s purpose — “run enterprise AI on your existing infrastructure” 2 — is a direct acknowledgement that MI350X and MI355X, at 1,000W and 1,400W in an OAM module, are simply not an option for a large share of existing enterprise data centres. MI350P’s 600W (configurable down to 450W) PCIe card, at roughly half the memory and compute of its OAM siblings, is AMD’s answer for that market rather than a smaller version of the same product aimed at the same buyer 7.