1.The number on the box is not the speed
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Fit a memory kit sold as 6000 MT/s and your computer will probably run it at a JEDEC speed grade such as 4800 or 5600 until you change a setting 1. This is the single most common surprise in building a PC, and nothing is faulty.
The reason is that every memory stick carries two speeds. One is a slow, safe speed that any machine can manage. The other is the fast speed printed on the box. The slow one is the default.
Intel says so plainly about its own system: "Intel XMP memory modules will first boot with the default JEDEC settings." And it explains why: "This ensures the first boot is successful even if the system does not support overclocking." 2
To get the speed you paid for, you switch on a stored profile in your computer's setup screen. Intel calls its version XMP; AMD calls its version EXPO. That is the whole trick.
DeeperThe detail
The slow default is not a mistake or a safety margin someone forgot to remove. It is chosen deliberately by the memory maker, and Intel states the reasoning in its own support article:
"The SPD configuration may be programmed at a lower frequency than the vendor-market value to support wider compatibility. (For example, the memory may be rated to run at 3200Mhz but the SPD default is set by the manufacturer at 2400Mhz.)" 3
The example uses DDR4-era numbers, but the principle is Intel's own and applies to any generation: the default is set below the marketed rating on purpose, so the stick works in as many machines as possible.
That has a consequence worth stating clearly, because it is where the marketing and the standard part company. The speed on the box is not a JEDEC-standard speed the module is guaranteed to run. It is a speed the manufacturer has tested and stored as a profile — often at a voltage above the standard’s, though see the Expert level of "Intel XMP" for how little either company publishes about that. Intel classes enabling it as overclocking — see "The warranty question", below.
The order of events, from Intel's original white paper: "These profiles are loaded into BIOS after the general JEDEC parameters are used to boot the system for stable operation." 4 The machine always starts slow, then adopts the profile if told to.
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There is a further distinction that trips up even careful readers, and it concerns what JEDEC has actually standardised at the top end.
In October 2025 JEDEC updated the SPD contents standard so that it "adds support for memory modules executing up to DDR5-9200 speeds" 5. Separately, the DRAM standard itself, JESD79-5C, brought an "Expansion of timing parameters definition from 6800 Mbps to 8800 Mbps" 6.
Those are two different things and the difference matters. SPD gaining the vocabulary to record a DDR5-9200 rating is not the same as JEDEC defining a DDR5-9200 DRAM speed grade with timings. A 9200 MT/s kit is an overclocking product whose rating the standard can now describe. It is not a standard-speed part.
For reference, JEDEC's own account of where DDR5 started: it "is expected to be launched at 4.8 Gbps (50% higher than DDR4's end of life speed of 3.2 Gbps)" 7. The current DRAM standard is JESD79-5D, version 1.41, published November 2025 8.
One limit of this page, stated rather than glossed: JEDEC’s speed-bin tables are paywalled — JESD79-5D is free to paying JEDEC members on login and costs US$423 to everyone else 8 — so the timings quoted further down come from manufacturers’ datasheets rather than from the standard document directly 1.
2.SPD: two speeds in one chip
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Every memory module carries a tiny chip that describes it to the computer. It is called SPD — Serial Presence Detect — and it is how a machine knows what you just plugged in without being told.
JEDEC, the body that writes the memory standards, describes what it holds: SPD data "provides critical information about all modules on the memory channel and is intended to be use by the system's BIOS in order to properly initialize and optimize the system memory channels" 9. The grammatical slip is JEDEC's own.
In shorter form, from JEDEC's announcement: "The SPD allows the host computer to detect the capabilities of the module, and to optimize the configuration of the memory interface for maximal performance." 10
The important part: the fast profile lives in that same little chip, in a different part of it. One chip, two sets of settings.
DeeperThe detail
The two-speeds-in-one-chip arrangement is not a metaphor. It is a documented division of a physical memory, and a manufacturer's datasheet spells out the numbers:
"The SPD data is stored in a 1024-byte, JEDEC JC-42.4-compliant EEPROM that is arranged as 16 blocks of 64 bytes per block." And: "The first 640 bytes are programmed by Micron to comply with JEDEC standard JESD400-5, 'DDR5 Serial Presence Detect (SPD) Contents.'" 11
So: a 1024-byte chip. Micron programs the first 640 bytes "to comply with JEDEC standard JESD400-5", and says that "the remaining 384 bytes of storage are available for use by the end user", with blocks 10 to 15 labelled end-user programmable 11. The JEDEC-programmed region is what every machine can read; the rest of the device is writable space outside it. The datasheet does not say where a vendor overclocking profile is stored, it does not mention XMP or EXPO at all, and this page does not claim to know — see the Expert level.
On DDR5 there are in fact two JEDEC documents involved, which is worth knowing if you go looking: JESD400-5x defines the contents of SPD 9, while JESD300-5x defines the device that holds them — the SPD5 hub with an integrated temperature sensor, whose hub function "allows isolation of a local bus from a Controller host bus" 12. Manufacturer datasheets point at it directly: "Refer to JESD300-5 SPD5118 device specification for complete details." 11
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The clearest historical illustration of the two-regions idea comes from Intel's own DDR3-era white paper, which simply names the byte range its profiles occupied: "XMP DDR3 DIMMs use bytes 176–255 to program specific profiles." 4
Do not carry those byte numbers into DDR5. DDR5's SPD is the 1024-byte device described above with a 640-byte JEDEC region 11, and no official statement of the byte offset at which a DDR5 XMP block begins was found in this check — not in Intel's published XMP material, not in JEDEC's free documents. The structural point stands on the Micron datasheet; the specific DDR5 offset is unverified here and this page does not assert one.
A related gap in the same direction. Intel publishes a document numbered 852792, which its own content-details page titles Intel Extreme Memory Profile (Intel XMP) 3.0 Memory for Intel Core Processors Datasheet and describes as providing "Intel® Extreme Memory Profile 3.0 (Intel® XMP) DDR5 unbuffered DIMM memory supplier self-certifications" 13. The XMP landing page links the same file under the shorter label "Intel® XMP 3.0 for DDR5 Memory Datasheet" 2. It is a freely downloadable PDF, not a gated one; it was not opened for this check, and by Intel’s own description it is a set of supplier self-certifications rather than a structure specification. No Intel document defining the XMP 3.0 data structure was found in the material read here, which is why so much of what circulates about it comes from third parties.
One consequence for anyone diagnosing a machine: because the JEDEC region is what a system reads first, a module whose profile fails to apply will still boot, silently, at the standard speed. A build that feels slower than it should is far more often an unapplied profile than a defective part.
3.Intel XMP, and what its versions mean
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XMP stands for Intel Extreme Memory Profile. Intel's own one-line description: "Intel® XMP overclocks compatible DDR5/DDR4 memory at higher and optimized speeds — beyond the standard settings." 2
What it spares you is fiddling. Intel says XMP "Enables end users to easily overclock their platforms by selecting the appropriate profile instead of adjusting individual parameters in the BIOS." 2 Instead of setting a dozen timings by hand, you pick a profile.
Which version goes with which memory, in Intel's own words: "Yes, Intel XMP 3.0 technology is exclusive to DDR5 memory modules." And: "For DDR4 memory modules, use Intel XMP 2.0 technology." 14
To switch it on, you go into your computer's setup screen. Intel: "You can load predefined and tested Intel® XMP profiles, using BIOS or a specific tuning application." 15
DeeperThe detail
The difference between the two versions is mostly about how many profiles a module can hold, and Intel publishes the numbers itself — which is worth quoting because third-party accounts of this vary:
The misspelling of "rewriteable" is Intel's own, as is the missing space in "XMP2.0". So: DDR4 gets two profiles; DDR5 gets up to five, of which three are set by the memory brand and two you can write yourself. Intel's own overclocking engineer confirms the split and the read-only nature of the vendor slots: "XMP 3.0 has a third read-only slot, carving out room for a wider range of pre-baked configurations. It also adds two rewritable profiles that allow full customization." 16
A small quality-of-life addition in 3.0, also from Intel: "XMP 3.0 introduces support for custom profile names up to 16 characters long." 16
And a genuinely new capability: "XMP3.0 includes new capabilities to improve user experience, support on module voltage control, and others." 2 The missing space is Intel’s again. The rails involved are named as "VDD, VDDQ, and VPP", all "derived from the DIMM itself" 16 — which is why DDR5 modules, unlike DDR4, regulate their own power.
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A contradiction on Intel's own pages, recorded because a careful reader will hit it. Intel's configuration article maps the versions to processor generations like this: "Intel® XMP 2.0: For DDR4 and Intel® Core™ 12th and 13th Generations Processors" and "Intel® XMP 3.0: For DDR5 and Intel® Core™ Generations Processors older than the 13th and 12th Generations" 15. The second statement cannot be right: DDR5 and XMP 3.0 arrived with 12th Gen, so processors older than that support no DDR5 at all. Intel’s dedicated article on the DDR5 question, meanwhile, says only that "Intel XMP 3.0 technology is exclusive to DDR5 memory modules" and that "For DDR4 memory modules, use Intel XMP 2.0 technology" 14 — it gives no generation mapping at all. Ignore the configuration article’s generation mapping: Intel publishes no reliable one.
No voltage range for XMP profiles appeared in any Intel material read for this check. It documents that XMP 3.0 controls module voltage and names the three rails 2 16, but no numeric range appeared in anything read for this check. The only figure available is from technical press, and is labelled as such: one analysis reports that the module's power-management chip on XMP parts "supports additional capabilities of Intel XMP requirements and overclocking capabilities which are out of JEDEC spec", including voltages "higher than 1.435V with 5/10mV switches" 17. Standard DDR5 runs at 1.1 V 18.
Two practical notes from Intel's own checklists. Before expecting a profile to work: "Check if the motherboard is listed as compatible with Intel® XMP by confirming it with the manufacturer" and "Check if the memory module is Intel® XMP Certified" 19. And Intel does not document the BIOS steps itself — it says "To find the right BIOS menu or tuning utility for your system, contact the motherboard vendor or your OEM for the related support." 15
Finally, Intel's own acknowledgement that a profile is not always the right setting to be in. Its Dynamic Memory Boost feature exists because "Rather than running aggressive settings all the time, its new Dynamic Memory Boost Technology intelligently switches between the baseline (default) speed and XMP profile of your choice whenever it detects a performance-bound workload." 16
4.AMD EXPO
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EXPO is AMD's equivalent, and stands for AMD Extended Profiles for Overclocking. AMD's own definition:
"The AMD Extended Profiles for Overclocking (AMD EXPO™ Technology) was developed to allow for user-friendly memory overclocking support of all types of memory, giving users an easy path to accelerated power to achieve accelerated memory in their system." 20
Which machines it is for, in AMD's words: "Created for AMD Ryzen™ processors on socket AM5, users get easy DDR5 memory overclocking with AMD Ryzen-optimized profiles for the best performance and experience." 20 So EXPO is a DDR5-and-AM5 technology.
It does the same job as XMP: stored settings you switch on, rather than timings you type in. Corsair's summary is a fair one: EXPO "allows for memory kits to reach their rated speeds quickly since validated settings for their intended platform are saved directly to each module" 21.
DeeperThe detail
AMD introduced EXPO alongside the Ryzen 7000 processors, and its launch announcement gives the commercial shape of it: "AMD EXPO™ technology provides users with advanced profile settings for DDR5 memory overclocking", it "was designed to achieve higher gaming performance from pre-configured overclocking profiles and is easy to implement", and — unusually — "AMD is offering EXPO technology to its industry memory partners without royalties or licensing fees." 22
The same release names the launch partners and the speeds: "AMD EXPO technology arrives to market alongside the AMD Ryzen 7000 Series processors, with offerings from ADATA, Corsair, GeIL, G.SKILL, and Kingston. Over 15 AMD EXPO technology-enabled memory kits will be initially available, with memory speeds up to DDR5-6400." 22
How many profiles does EXPO support? AMD does not say, in anything read for this check. Its EXPO page, its AM5 chipset page and the Ryzen 7000 launch release were all read, and none gives a profile count or lists what a profile contains 20 23 22; its compatibility-list page does not render its contents at all, so nothing can be established from it either way 24. The only figure available comes from a module brand: Kingston states that EXPO provides for two overclock profiles plus a user-programmable one, and that "Kingston FURY parts with EXPO utilize Profile 0 for the advertised speed and latency, and Profile 1 for a secondary, less aggressive overclock." 25 That is Kingston's account, not AMD's, and this page does not upgrade it.
AMD does publish a tested-kit list, and its own description of it is the most useful sentence it has written on the subject: the list "identifies memory kits tested across systems to run at rated speed and latency, and shows whether each kit supports the AMD EXPO™ Technology overclocking memory standard for DDR5, is certified as AMD EXPO™ Technology: Featuring Ultra Low Latency, or is compatible with the XMP standard" 24. Note the third category — AMD itself treats XMP-compatible kits as a valid option on AM5.
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A limit of this page that is a limit of AMD's site. AMD's memory compatibility list did not render its contents in this check. Two retrievals of it returned only navigation, a banner, the page title and the one descriptive sentence quoted above — no kit rows, no column headings, no filters, no pagination and no download link 24. The data is evidently injected by script. So this page cannot say what is on the list, how many kits it holds, or whether it carries a disclaimer. Nothing here should be read as a claim that any of those is absent.
On the cross-platform question — an EXPO kit in an Intel board, or an XMP kit in an AMD one — neither AMD nor Intel was found to publish an answer. The most direct guidance comes from a module maker, and it is worth quoting in the order it appears, because the first sentence alone would mislead:
Corsair writes that "If you buy DDR5 RAM that supports Intel XMP 3.0, that memory won't work with an AMD platform. You're locked into Intel's chips unless you're willing to buy more memory specifically for a platform change." A little further down the same article it says: "In practice motherboard manufacturers have done a good job supporting both standards—XMP on AMD platforms and EXPO on some Intel ones." 26 Its separate article on the question is blunter still: an XMP kit in an AMD board means "In practice there's a good chance that the memory will work, albeit with a few caveats", and "You should be able to get it working, just not at a fast speed setting" 27.
Some brands now sidestep the problem. Corsair states that "Since this page was originally published, all CORSAIR AMD Memory Kits are now dual profile, meaning that they are compatible with EXPO and XMP. However, Intel Memory kits are not dual-profile." 26 And two brands publish a way to tell which standard a kit carries before buying: Corsair notes that "Intel XMP kits will be denoted with C__, AMD EXPO will be Z__" in its DDR5 part numbers, giving "CMP32GX5M2X7200C34 = Intel XMP" and "CMP32GX5M2B6000Z30 = AMD EXPO" as its own examples 28; Kingston encodes it as a "Profile Type" field where "E - AMD EXPO & Intel XMP" 29. Kingston’s blank value covers XMP-only, Plug N Play and dual kits alike, so an explicit E tells you something but a blank does not 29.
5.The warranty question, in both companies’ words
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Here is the part almost nobody mentions, and both companies put it in writing: switching on a memory profile is overclocking, and both Intel and AMD say in writing that it puts a warranty at risk — and they do not use the same verb.
Intel, on its own XMP page: "Examples: Overclocking and enabling Intel® XMP, which is a type of memory overclocking, and using it beyond the given specifications may void the processor warranty." 2
AMD is firmer. The footnote on its own EXPO page reads: "Overclocking and/or undervolting AMD processors and memory, including without limitation, altering clock frequencies / multipliers or memory timing / voltage, to operate outside of AMD's published specifications will void any applicable AMD product warranty, even when enabled via AMD hardware and/or software. This may also void warranties offered by the system manufacturer or retailer." 20
Read those two side by side. Intel says may void. AMD says will void — and adds that this holds "even when enabled via AMD hardware and/or software".
DeeperThe detail
Both statements deserve careful reading rather than alarm, and the qualifiers are where the meaning sits.
Intel's sentence is conditional twice over: it says "may void", and it conditions the risk on "using it beyond the given specifications" 2. It is not an unconditional statement that enabling XMP ends your warranty. Intel's general boilerplate is the same shape: "Altering clock frequency or voltage may void any product warranties and reduce stability, security, performance, and life of the processor and other components", followed by "Check with system and component manufacturers for details" and, more pointedly, "Technology may enable Intel to detect alteration of clock frequency or voltage during issue investigations." 15 30
AMD's is broader in one respect and narrower in another. Broader, because it says "will void" and covers "memory timing / voltage" explicitly. Narrower, because it does not name EXPO at all — it is a general overclocking disclaimer, numbered GD-106, that AMD attaches as the footnote to its EXPO page 20. The same clause appears on its AM5 chipset page 23, and the Ryzen 7000 launch release carries a plainer version: "AMD's product warranty does not cover damages caused by overclocking, even when overclocking is enabled via AMD hardware and/or software." 22
So the honest summary is this. Neither company promises that using the feature it markets will leave your warranty intact. Intel hedges with "may" and conditions it on exceeding specifications; AMD says "will" but never says the word EXPO. An EXPO-specific warranty sentence was not found in this check.
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AMD’s fullest statement is in its Threadripper and Ryzen Master overclocking guide — note the subject of that document — and it is unambiguous enough to quote at length. The guide states that "AMD does not provide support or service for issues or damages related to use of an AMD product outside of the Specifications or outside of factory settings", that "Recipient understands that operation of the product outside of AMD's published specifications will void any AMD warranty", and — in capitals in the original — "DAMAGES CAUSED BY USE OF YOUR AMD PROCESSOR OUTSIDE OF OFFICIAL AMD SPECIFICATIONS OR OUTSIDE OF FACTORY SETTINGS ARE NOT COVERED UNDER ANY AMD PRODUCT WARRANTY." 31
Intel’s equivalent long-form warning is older, and is still published in Intel’s own document library. Its last sentence is the bluntest of the statements read here: "Warning: Altering clock frequency and/or voltage may (i) reduce system stability and useful life of the system and processor; (ii) cause the processor and other system components to fail; (iii) cause reductions in system performance; (iv) cause additional heat or other damage; and (v) affect system data integrity. Intel has not tested, and does not warranty, the operation of the processor beyond its specifications." 4
Two scoping points, because this is the section most likely to be quoted out of context. First, watch the scope, because the two companies do not draw it in the same place. Intel’s XMP-page sentence names the processor warranty specifically 2; its general boilerplate is broader, covering "any product warranties" and "the processor and other components" 15. AMD’s GD-106 is broader still: it names "AMD processors and memory", voids "any applicable AMD product warranty", and adds that overclocking "may also void warranties offered by the system manufacturer or retailer" 20. What neither clause governs is your memory kit’s own warranty, which comes from the module brand — those are covered on the individual brand guides in this section, where "lifetime" turns out to mean different things at different brands. Second, the Intel white-paper warning dates from 2009 4, so present it as Intel's long-standing position rather than as current DDR5-era text.
What neither company publishes, and this page therefore does not claim: any statement that running a profile within its rated settings is covered. Intel's conditional "beyond the given specifications" implies a line exists; nothing read here says where it is.
6.What your processor actually supports
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There is a second ceiling, and it belongs to your processor rather than your memory. Intel publishes, on each processor’s ARK specification page, the memory speed it actually supports.
Intel tells you where to look: "Enter the processor number in the search box on the product specification page (ARK) and click Enter. Look for the Memory Specifications section. The supported memory for the product is listed under Memory Types." 3
So a kit rated far above that figure is running outside what the processor maker validates. It may well work — that is what a profile is for — but it is not "supported" in Intel's sense of the word.
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Intel is direct about what happens when the kit is faster than the processor supports, though the clearest statement is on a server page, so note the subject: "It may be possible to use memory rated for higher speeds; however, the memory will be used at a lower speed not higher than the maximum memory speed supported by the processor." 34 That article is about Xeon processors specifically.
It also gives a second, separate reason a system may not reach its rated speed, and this one catches plenty of builders: "The maximum supported memory speed may be lower when populating multiple DIMMs per channel on products that support multiple memory channels." 35 Four sticks are harder to run fast than two.
Three different numbers are in play here and most write-ups conflate at least two of them. One: the SPD default, a property of the module, "set by the manufacturer" at a lower frequency "to support wider compatibility" 3. That is what you boot at. Two: the ARK ceiling, a property of the processor, and what Intel validates 32. Three: the number on the box, which is a stored profile and is neither of the first two. Saying which one is doing the work at each step is the difference between an explanation and a muddle.
The bandwidth figure Intel publishes is derived from the supported speed, not from any kit: 5600 MT/s × 8 bytes × 2 channels = 89.6 GB/s, exactly the figure on the i9-14900K page 33. That arithmetic is ours, on Intel's own numbers.
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There is a further mechanism by which a higher data rate can cost you performance, and it lives in the memory controller's own clock ratio. Intel defines its version: "Gear 1 means processor memory controller and memory speed are equal. Gear 2 means processor memory controller operates at half the memory speed (such as CPU memory controller is at 1600MHz while memory speed is at 3200MHz when operating as Gear 2)." 36
Note carefully what Intel does not say there. That article defines the ratio and says nothing about which gear gives lower latency or better performance, and it is written about DDR4 and 11th Gen Core processors 36. The widely-repeated claim that Gear 1 is better for latency is not Intel's, and this page does not attribute it to Intel.
AMD exposes analogous clocks under different names, though no AMD statement equating them to Intel’s gears was found. Its Threadripper and Ryzen Master overclocking guide glosses them as MEMCLK ("Internal and external memory clock"), FCLK ("Data Fabric clock – equal to Memory clock") and UCLK ("Internal Memory Controller clock – equal to Memory clock") 31. AMD does not use the word "Gear" in anything read for this check, and no AMD statement on 1:1 versus 1:2 UCLK-to-MEMCLK ratios was found.
The ratio framing applied to AMD comes from a module brand, borrowing Intel's vocabulary, and should be attributed there rather than to AMD: Kingston describes Gear 1 as the memory controller and memory running at the same frequency, "Best for gaming or latency-sensitive workloads", with DDR5-6000 "generally the highest speed that can achieve Gear 1 out of the box", and Gear 2 as the controller at half the memory frequency, "Best if you need memory bandwidth for AI, video editing, 3D rendering or any applications where throughput is more important than responsiveness" 37. The much-quoted "DDR5-6000 sweet spot" for AMD builds is Kingston’s figure, not AMD’s. AMD does publish DDR5-6000 test configurations of its own on the EXPO page 20, but it never calls the figure a sweet spot, and no AMD statement on memory-controller ratios was found here.
7.Why a faster kit is often no quicker
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A faster kit moves more data per second. It does not necessarily answer any quicker — and for gaming, answering quickly is often what matters.
Memory speed has two numbers. MT/s is how much data per second. CL, the CAS latency, is how many clock cycles you wait before the first data arrives. A higher MT/s figure with a higher CL can leave you exactly where you started.
The arithmetic is simple, but mind the units. The wait in nanoseconds is CL multiplied by the clock period, and the clock period is 2000 ÷ the MT/s figure — not 1000, because DDR transfers twice per clock. So DDR5-6000 CL30 is 30 × (2000 ÷ 6000) = 10 ns. And DDR5-8000 CL40 is 40 × (2000 ÷ 8000) = 10 ns as well: exactly the same first-word wait, with the faster kit simply delivering more once it starts. That calculation is ours.
This is why the CL number on the box matters as much as the MT/s number, and why two kits at the same speed can be priced very differently.
DeeperThe detail
The clearest evidence for this is in the manufacturers’ own timing tables, and it is striking once you see it. A Micron DDR5 UDIMM datasheet gives a single first-word access time for the part — tAA = 16.000 ns — across every speed grade it covers, from PC5-4800 to PC5-5600 1. The data rate climbs; the wait before the first word does not move.
Read that figure the way the datasheet asks. Its own note says that "tAA, tRCD, tRP and tRC values represent the tightest capability across all supported data rates and CL combinations" 1 — so 16.000 ns is a part-level statement of the best the module can do, not a JEDEC-mandated minimum published grade by grade. This page does not claim a per-grade figure, because JEDEC’s own bin tables were not readable for this check (see Expert).
One grade can be worked all the way through, because a Micron DDR5 component datasheet publishes the pair: the DDR5-4800B bin at tAA 16.000 ns with CL40 18. Check it: at DDR5-4800 a clock cycle is 2000 ÷ 4800 = 0.4167 ns, so CL40 × 0.4167 = 16.7 ns, against the published 16.000 ns. CL40 is the smallest even cycle count that clears the floor at that clock — 16 ÷ 0.4167 = 38.4, rounded up to the next even value. That calculation is ours, on the datasheet’s own paired numbers; the 0.7 ns gap between the two is left as it is rather than smoothed away.
Which tells you what an overclocking kit is actually selling. Its value is not the big MT/s figure on its own — it is pairing a high data rate with a CL tighter than the standard floor would require, so you get bandwidth and latency. A DDR5-6000 CL30 kit sits at 10 ns, well under the 16 ns floor above; a DDR5-8000 CL40 kit matches that same 10 ns while moving a third more data.
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Sourcing note. JEDEC’s speed-bin tables are paywalled. JESD79-5D (version 1.41, November 2025) is free to paying JEDEC members on login and costs US$423 to everyone else 8, so the figures above come from manufacturers’ datasheets rather than from the standard document 1 18. No complete A/B/C bin list was verified against a single authoritative table in this check, and an early retrieval returned per-grade CL figures that conflicted with the module datasheet on a second reading; they were discarded as extraction error rather than published. That is why this page gives one fully worked grade and no table of them.
There is one more reason an unstable fast profile can be hard to spot, and it comes from DDR5 itself. Every DDR5 chip corrects some of its own errors. JEDEC frames this as a manufacturing enabler rather than a user feature: "On-die ECC and other scaling features enable manufacturing on advanced process nodes." 7
What on-die ECC does not do is the part that matters here, and the clearest statements come from a module manufacturer and from technical press rather than from JEDEC’s free material: on-die ECC "corrects single-bit errors inside the DRAM chip before data is sent to the CPU", but "does not protect data moving between the memory module and the CPU or GPU, and cannot correct errors that occur outside the chip, such as on the module traces or at the memory controller", and "does not turn a standard DDR5 module into a server-grade ECC module" 38. The mechanism, per EE Times: on-die single error correction ECC "pairs 128 data bits with 8 parity bits to form a 136-bit codeword stored in the DRAM during a write command", and "On-die single-bit ECC does not eliminate the need for error correction across the whole memory subsystem." 39
Put those together and the practical warning writes itself. On-die ECC does not cover the module traces or the memory controller 38 — which, on our reading rather than ATP’s, is exactly where an aggressive data rate bites hardest. An over-ambitious profile need not crash; it can corrupt quietly. No source read for this check frames on-die ECC as protection against overclocking instability, and this page does not either.
8.CUDIMM: the stick with its own clock
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The newest kind of desktop DIMM carries its own clock chip. It is called a CUDIMM — a Clocked Unbuffered Dual Inline Memory Module — and the chip on it is a CKD, or Clock Driver 40 41.
The problem it solves is simple to state. At very high speeds, the clock signal travelling from the processor across the board and along the stick degrades, and the chips at the far end stop agreeing about when "now" is. A CKD rebuilds the signal on the module itself.
JEDEC's own account: "Integrating a Clock Driver (CKD) into a DDR5 DIMM provides numerous advantages, particularly in memory stability and performance, and enhances signal integrity and reliability at high speeds." And: "By regenerating the clock signal locally on the DIMM, a CKD ensures stable operation even at elevated clock speeds." 42
What it buys, in numbers: JEDEC says data rates rise "from 6400 Mbps to 7200 Mbps in the initial version of the standard, and targeting up to 9200 Mbps in future versions" 42.
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The standards, for anyone wanting to look them up. The clock driver itself is JESD82-531B.02, which "defines specifications of DC interface parameters, switching parameters, and test loading for definition of the DDR5 Clock Driver (CKD) for re-driving the DCK for CUDIMM, CSODIMM, and CAMM applications" 41. The desktop module is JESD323B, covering 288-pin, 1.1 V clocked unbuffered modules — CUDIMMs and their quad-rank CQDIMM siblings 40; the laptop equivalent is JESD324B, covering 262-pin, 1.1 V clocked small-outline modules — so clocked laptop memory exists too 43.
A DRAM maker's description of the underlying problem is worth having, and note that its subject is DDR5 as a generation rather than any one vendor: "While DDR5 offers rapid speeds, scaling challenges have made it difficult to deliver DDR performance increases while ensuring reliable high speeds and signal integrity, especially when combining high bandwidth with large capacity." 44 Micron adds that it "has directly integrated the clock driver into the memory module to conquer electrical challenges at the root" 44.
A module maker's description of what the chip actually does is the most concrete: "The CKD serves as a buffer for the clock signals sent from the CPU to the memory module. It reconditions both the timing and voltage amplitude of these signals, enhancing signal integrity by reducing clock jitter and ensuring synchronized timing across each memory chip." 45
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Now the fact most likely to change a purchase: a CUDIMM does not behave the same way on Intel and AMD.
Corsair states it plainly: "CUDIMM modules can run in bypass mode or in single/dual PLL mode. Currently, on AMD platforms only the bypass mode is supported." 46 And on its technical page: "AMD doesn't support the Single or Dual PLL modes yet. Although if you plug a CUDIMM into an AMD platform, they tolerate the use of it by operating in Bypass mode only." Alongside: "As of now, CUDIMMs are fully compatible with Intel platforms." 45
In bypass mode the clock chip is effectively switched out of circuit — "the CKD doesn't regenerate and amplify the signal; basically, it works as a traditional UDIMM" 45. Which means the feature you paid for is doing nothing. On Intel's side the same page reports that "on Intel® Z890 motherboards, the memory speed can go over 9,000MT/s" 45.
Two honest caveats on that finding. First, Corsair’s own bypass-mode ceiling is inconsistent — and note that both figures are stated about older DDR5 platforms, not about AMD. Its technical explainer says bypass mode "is used for compatibility on older DDR5 platforms. However, speeds may be limited to 6,000MT/s" — note the hedge 45. Its support article for chipsets earlier than Z890 says instead that "the base speeds are lower than 6400MHz depending on the platform" 47 — Corsair’s "MHz" there, reproduced as written, for what is a MT/s figure. Corsair publishes no single consistent number, this page reports both rather than picking one, and neither of them is an AMD data-rate ceiling. Second, and more importantly: no AMD or JEDEC source was found that mentions bypass mode, PLL modes, or an AMD data-rate limit at all. Of the AMD pages readable for this check, none mentions CUDIMM or the CKD 20 23; AMD’s memory compatibility list is script-rendered and its contents could not be read either way 24. And JEDEC's free material describes the clock driver without addressing vendor support 41 42. The asymmetry rests entirely on one module maker's technical documentation.
The practical reading for a builder is therefore: on a current Intel platform a CUDIMM is what unlocks the speeds above roughly 6400; on AM5 today it is, at best, an ordinary UDIMM that cost more. Verify against your own board's documentation before buying, because this is exactly the kind of fact that a firmware update or a new processor generation changes — and because, as the caveat above says, the companies whose silicon decides it have published nothing on the question.