Every term below is defined the way the company or standards body that owns it defines it, not the way a forum thread does. Where two official sources phrase a term differently, both are given.
Stuck at any point? Ask an AI about this page →DDR stands for Double Data Rate, and it is the family every mainstream desktop and laptop memory module belongs to. Each new generation — DDR3, then DDR4, then DDR5 — is a separate, physically incompatible standard, not a speed upgrade of the last one. Kingston’s own RAM guide puts it plainly: “A DDR5 memory module will not physically fit into a DDR4 or DDR3 memory socket. While they may look similar, a notch on the bottom of the module acts as a key and will only fit into a compatible socket” 1. JEDEC, the industry standards body, owns the specification for each generation 2.
JEDEC’s own announcement of the DDR5 standard put the jump in numbers: DDR5 was “expected to be launched at 4.8 Gbps (50% higher than DDR4’s end of life speed of 3.2 Gbps)” and “supports double the bandwidth as compared to its predecessor, DDR4” 3. Kingston’s own overview states the same comparison in its own words: “DDR5 starts at 4800MT/s, while DDR4 tops out at 3200MT/s” 4. Both figures describe the JEDEC-defined baseline speed of each generation, not what any particular kit is sold at — see Speed, timing and latency below for that distinction.
The current DDR5 standard is JESD79-5D, and Kingston dates the standard’s development to 2017, describing it as begun “by the industry standards body JEDEC… with input from the leading global memory semiconductor and chipset architecture vendors, including Kingston” 4 5. JEDEC revises each generation’s document over its life: this site’s citation for the DDR5 standard is version 1.41, dated November 2025 5. The keyed notch mentioned above (see Simple) is Kingston’s own description of the physical mechanism 1; JEDEC’s dictionary defines the general DIMM form the connector belongs to as “a packaging arrangement of memory devices on a socketable substrate” 2.
A DIMM (Dual In-line Memory Module) is the standard memory stick shape used in desktop PCs. Kingston’s own glossary defines it as a module “that has separate electrical contacts on each side of the module” 6. A SO-DIMM (Small Outline DIMM) is the same idea in a shorter form factor: Kingston’s glossary describes SO-DIMMs as being “used mainly in laptops and small form factor PCs” 6.
Beyond plain DIMM and SO-DIMM, the module world splits by what sits between the memory chips and the memory controller. Kingston’s glossary defines an UDIMM (Unbuffered DIMM) as a module “that does not feature a Register or buffers”, used “traditionally… in PCs/workstations/laptops”, and an RDIMM (Registered DIMM) as “a server class memory module that features a Register component, also known as a Registered Clock Driver (RCD), which acts as a buffer between the DRAM… components… and the memory controller” 6. An LRDIMM (Load Reduced DIMM) goes further: Kingston describes it as featuring “data buffers to reduce loads on the memory controller, which would otherwise toggle memory speeds down to compensate” 6 — a step up from RDIMM aimed at systems with many modules per channel.
DDR5 added a further pair of clocked formats, each with its own JEDEC common standard. A CUDIMM adds an onboard clock driver: Corsair’s own explainer describes the added chip as “responsible for regenerating the clock signal used by the memory chips” for stability at higher speed 7, and JEDEC’s own standard for it is titled “DDR5 clocked unbuffered dual inline memory module (CUDIMM and CQDIMM) common standard”, JESD323B 8. Its small-outline counterpart, CSODIMM, has its own JEDEC standard, JESD324B 9. Two further formats depart from the DIMM shape entirely. CAMM2 (Compression Attached Memory Module 2) is, in Kingston’s own words, “the JEDEC industry standard iteration of Dell’s CAMM technology, specifically designed to provide modular memory solutions for manufacturers of ultra-thin laptops” 10; Corsair’s explainer adds that it uses “a pin grid array, similar to modern processors, as opposed to the double-sided format used by traditional DIMMs”, so it “lay[s] flat on the motherboard instead of perpendicular to it” 7. MRDIMM (Multiplexed-Rank DIMM) is server-only: Kingston calls it “a cutting-edge memory solution designed specifically for data centers and enterprise server systems where scalability and performance are key” 10.
A memory stick’s speed is usually written as a single number, like DDR5-6000, but that hides several separate numbers. Kingston’s glossary calls the headline figure the data rate: “the speed class of a memory module (formerly referred to as frequency)” 6, measured in MT/s, which Kingston defines as “million transfers per second… the correct term used to describe the data rate (speed) of all DDR memory modules” 6.
Alongside the data rate sits a second figure, usually printed next to it, like CL30: CAS Latency (CL). Corsair’s own explainer defines it as “the number of cycles it takes between the processor asking for data from the memory and returning it” 11; Kingston’s glossary describes CAS (Column Address Strobe) as the mechanism, with CL being “the time it takes in clock cycles to find the open row of memory needed to be accessed” 6. A lower CL at the same data rate means less delay per access — the same reasoning that separates a rated speed from what a system actually runs at, covered in full on XMP, EXPO and why your memory runs slower than the box says.
CL is one of four timing parameters usually quoted together, e.g. “CL30-37-37-96”. Corsair’s own explainer defines the other three: tRCD (RAS to CAS Delay) as “the number of cycles it takes between the activation of the line (RAS) and the column (CAS) where the data are stored in the matrix”; tRP (RAS Precharge) as “the number of cycles it takes between disabling the access to a line of data and the beginning of the access to another line of data”; and tRAS (Active to Precharge Delay) as “…how long the memory must wait until the next memory access request can be initiated” 11. All four are cycle counts, not fixed time durations, so the same CL number represents a different real-world delay at different data rates — a lower CL at a lower data rate can be a longer delay in nanoseconds than a higher CL at a higher data rate.
A memory stick’s box speed is not what a new PC boots at by default; JEDEC’s baseline speed for the generation is what actually runs until something turns on a faster profile. XMP (Intel) and EXPO (AMD) are each company’s own name for that profile. Intel’s own page is titled “Intel Extreme Memory Profile Unlocks Gaming Performance”, and describes an XMP profile as a set of “preset combinations of speed, timing, and voltage, tested by the manufacturer for stability” 12. AMD describes EXPO as allowing “user-friendly memory overclocking support of all types of memory, giving users an easy path to… accelerated memory in their system” 13.
The two are not interchangeable: XMP profiles are read by Intel-platform motherboards and EXPO profiles by AMD Socket AM5 boards, and the site’s own explainer on this covers what each company says about warranty if you enable one — see XMP, EXPO and why your memory runs slower than the box says for the full comparison, including what each vendor will and will not promise once a profile is turned on.
XMP has gone through two generations that matter for compatibility. Kingston’s own glossary defines XMP 2.0 as “an Intel specification for allowing memory and motherboard vendors to set overclock profiles (DDR3 & DDR4) to allow easy overclocking for the end user”, and XMP 3.0 as “the latest version of XMP made for DDR5 supporting up to five profiles, three for the memory manufacturer and two customizable for manual overclocking by the end user” 6. Full technical detail for XMP 3.0 is published as an Intel datasheet, cited on the XMP & EXPO explainer 12.
A memory channel is the data path between a module and the memory controller. Kingston’s glossary defines it as “the data transfer path between a memory module and a memory controller (typically found within the processor)” 6. Installing two matched modules across two channels — dual channel — or four across four — quad channel — adds bandwidth rather than just capacity: Kingston defines each as a “socket architecture where [two/four] identical memory modules installed aggregate their bandwidth to increase system performance” 6.
How many channels a system actually has is set by the CPU and motherboard, not by the memory itself — a stick that supports dual channel operation will still only run single-channel if it is the only module installed, or if it is installed in the wrong pair of slots for that board. This is the first fact a “will it fit my machine” check has to establish, and it sits outside what any individual memory maker publishes: the module data sheet states the memory’s own capability, but the motherboard manual states which physical slots pair into which channel.
A rank is a narrower unit than a channel or even a module. Kingston’s glossary defines it as “a data block that is 64-bits wide”, adding that “the amount of bits is determined by the amount of banks, not DRAM chips” 6. A single module can be single-rank or dual-rank: dual-rank packs two independently addressable 64-bit blocks onto one physical stick, which is why two sticks with the same advertised capacity are not always electrically equivalent to a system’s memory controller. RDIMM and LRDIMM (see Form factors above) exist specifically to let a system support more ranks per channel than an unbuffered module can drive reliably.
ECC stands for Error Correction Code. Kingston’s glossary defines it as “an algorithm that can detect and correct single or multiple bit data corruption in computing” 6. Server and workstation memory commonly carries ECC; most desktop and laptop memory does not.
DDR5 also introduced a second, separate kind of error correction that is easy to confuse with module-level ECC. Kingston’s glossary defines on-die ECC (ODECC) as “ECC incorporated within the DRAM chip to correct bit errors before they transmit to the module” 6, and JEDEC’s own announcement of the DDR5 standard names it as a standard feature: “on-die ECC and other scaling features enable manufacturing on advanced process nodes” 3. The two are not the same protection: on-die ECC corrects errors inside a single chip before the data ever leaves it, while module-level ECC (an extra chip, and an extra data path to the memory controller) catches errors that occur afterwards, in transit or elsewhere on the module.
Because on-die ECC is a chip-level feature described in JEDEC’s own DDR5 standard announcement 3 5 rather than a module-level add-on, its presence is not what a buyer means by asking for “ECC memory”: that phrase refers to module-level ECC, which requires a compatible memory controller and is the feature server and workstation platforms specifically advertise support for. RDIMM vs. UDIMM (see Form factors above) is a separate, buffering-related distinction, not itself the ECC/non-ECC distinction — a module can in principle be unbuffered and ECC, or registered and non-ECC — though ECC and RDIMM are commonly paired in server products.
A module’s printed capacity, like 16GB, is not the same number as a chip’s density. Kingston’s glossary defines density as “the individual capacity of a DRAM chip… measured in Megabits or Gigabits” 6 — the module’s total capacity comes from how many of those chips are populated on it.
How wide each chip’s data path is also varies. Kingston’s glossary calls this chip organization: “the column width of a DRAM component. The DRAM column widths used for memory modules are x16 (‘by 16’), meaning 16 columns, x8, and x4” 6. A module built from fewer, wider (x16) chips reaches the same total capacity as one built from more, narrower (x8 or x4) chips, and the two are not always interchangeable to a given memory controller.
Kingston’s glossary also defines form factor broadly, covering both memory and storage products as a description of “the size and shape of an electronic component” 6 — the same word used elsewhere on this site for a module’s physical shape (DIMM, SO-DIMM, CAMM2 and the rest, covered above) rather than a specification of its electrical behaviour.
SPD (Serial Presence Detect) is a small chip on every module that reports the module’s own specifications — capacity, speed, timings and, on DDR5, any XMP or EXPO profile — to the system at boot. JEDEC’s standard for what a DDR5 module’s SPD must contain is JESD400-5D.01 14.
DDR5 changed how SPD is read: instead of the memory controller reading the SPD chip directly, a separate SPD hub chip sits between them. JEDEC’s own standard for this hub is JESD300-5B.01 15, first announced alongside the SPD contents standard: JEDEC’s own press release for that original publication is titled “JEDEC Announces Publication of the SPD5118 Hub and Serial Presence Detect Device and the DDR5 SPD Contents Specifications” 16. Both standards have been revised since that first release; this site cites the current versions, JESD300-5B.01 and JESD400-5D.01, directly 15 14.
What SPD does and does not report about who actually manufactured the DRAM die inside a given stick — a separate question from the module brand printed on the label — is its own explainer rather than repeated here, to avoid the same content drifting in two places: see whose DRAM chips are actually inside your memory stick, which reads the JESD400-5D.01 and JESD300-5B.01 standards specifically for that question.
16 sources, all checked September 2026. Official = the company or organisation’s own page; Filing = a document filed with a regulator or an annual report; Standard = a published industry standard; Paper = a peer-reviewed or conference paper; Research = an independent research body; Government = a government page; Press = news coverage, used only where no official source exists.
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