AI Chips

AI Chips: Everything About the Chips That Run AI

Who makes the chips behind ChatGPT, Gemini and Claude, how they are made and where, what they cost, and the facts buried in company filings. Every brand is explained in the same 16 sections, from simple to expert, with every number linked to its source.

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Brand guidesOfficial sources onlyChecked September 2026

Chip brands

Each card uses the same fields so you can compare at a glance. New brands are added as their research is finished and checked.

NVIDIA

Flagship
Vera Rubin NVL72 (Blackwell Ultra GB300 NVL72 before it)
Who makes it
TSMC (chips) with partners for packaging and assembly
Real strength
The whole stack: chips, networking, racks and CUDA software
Read the full guide →

AMD

Flagship
Instinct MI455X in the Helios rack (MI355X before it)
Who makes it
TSMC (chiplets), with partners for packaging and assembly
Real strength
432 GB of memory per chip, open software, and gigawatt-scale AI-lab deals
Read the full guide →

Intel

Flagship
Gaudi 3 accelerator; Xeon 6 as the host CPU in AI servers; Crescent Island next
Who makes it
Intel's own fabs for its processors; TSMC for Gaudi 3
Real strength
Xeon runs inside NVIDIA's DGX systems, and Intel owns chip factories in the US and Europe
Read the full guide →

Google TPU

Flagship
Ironwood (TPU7x) today; TPU 8t and TPU 8i announced
Who makes it
Google designs; Broadcom co-develops and supplies; foundry not disclosed
Real strength
9,216-chip pods, published per-chip prices, and a million-chip Anthropic deal
Read the full guide →

Amazon Trainium

Flagship
Trainium3 (3 nm) in Trn3 UltraServers; Trainium4 due 2027
Who makes it
Annapurna Labs (Amazon) designs; foundry not disclosed
Real strength
Anthropic and OpenAI deals, and a chips business past a $25 billion run rate
Read the full guide →

Microsoft Maia

Flagship
Maia 200 (TSMC 3 nm), in production since early 2026
Who makes it
Microsoft designs; TSMC manufactures
Real strength
216 GB of memory per chip, and it already runs GPT-5.2 and Copilot
Read the full guide →

Meta MTIA

Flagship
MTIA 300 in production; MTIA 400, 450 and 500 due 2026–27
Who makes it
Meta designs with Broadcom; TSMC made earlier generations
Real strength
Hundreds of thousands of chips in service and a new chip every six months
Read the full guide →

Apple

Flagship
M5 Ultra (Mac Studio), M6 and A20 Pro, the first 2 nm Apple chips
Who makes it
Apple designs; TSMC makes, including in Arizona
Real strength
AI hardware in every iPhone, iPad and Mac, with one shared pool of memory
Read the full guide →

Cerebras

Flagship
WSE-3 wafer in the CS-3; CS-4 with three faster wafers, first shipments announced for Q3 2026
Who makes it
Cerebras designs; TSMC makes the wafers (5 nm)
Real strength
One chip the size of a dinner plate, with 44 GB of memory on the chip itself
Read the full guide →

Groq

Flagship
First-generation LPU in GroqCloud; NVIDIA now sells the Groq 3 LPX under licence
Who makes it
Groq designed; 14 nm first chip; Samsung makes Groq 3 for NVIDIA
Real strength
All memory on the chip, scheduled in advance by the compiler, for very fast answers
Read the full guide →

Huawei Ascend

Flagship
Ascend 910C in Atlas 900 A3 SuperPoD; Ascend 950 series from 2026; 960 in 2027
Who makes it
HiSilicon designs; Huawei does not name its factories (press: SMIC; stockpiled TSMC dies)
Real strength
Scale over single-chip speed: thousands of chips joined into one system
Read the full guide →

Every chip, on its own page

All 65 chip models across the brands above, each with its own launch history, full spec table, official pricing (or an honest “not published”), which systems use it, and what came before and after it.

Start here: how AI chips work

Plain-English explainers that every brand page builds on.

How AI chips work

Why AI needs special chips, what is inside one, and why memory is the real limit.
Read the explainer →

How a chip is made: sand to server

Every step from sand to a working AI rack, who does it and where.
Read the explainer →

AI memory (HBM) and why it is scarce

What HBM is, why every AI chip needs it, who makes it, and why it is sold out.
Read the explainer →

How to read a chip spec sheet

What the numbers mean, which footnotes change them, and what to ask before comparing chips.
Read the explainer →

Export rules and the US–China chip contest

What the US rules on AI chips say, what changed, what it cost, and how China responded.
Read the explainer →

India’s semiconductor push

What India has approved, built and shipped in chips — and what it still cannot make.
Read the explainer →

Compare the brands

Open the full comparison page. Headline figures as each company states them. Compare dense with dense and FP8 with FP8: see the glossary below. Rows are added as each brand guide is published.

BrandCurrent flagshipMemory per chipAI compute per chipMade byPublished price
NVIDIARubin (Vera Rubin NVL72)288 GB HBM450 PFLOPS NVFP4 inference; 35 trainingTSMCNot published; rentable from about $5 per H100 GPU-hour (AWS Capacity Blocks)
AMDInstinct MI455X (Helios rack)432 GB HBM440 PFLOPS FP4; 20 FP8 (dense/sparse not stated)TSMCNot published; rentable from under $2 per MI300X GPU-hour (Vultr, pre-emptible)
IntelGaudi 3128 GB HBM2e1,678 TFLOPS BF16/FP8 (white paper); 1,835 in Intel's Hot Chips slidesTSMC (5 nm)$125,000 list for an 8-chip kit (Intel, 2024); IndiaAI ₹153/hour per card before GST
Google TPUIronwood (TPU7x); TPU 8t/8i coming192 GiB HBM4,614 TFLOPS FP8 (Google, "peak")Google with Broadcom; foundry not disclosed$12.00 per chip-hour on demand (Google Cloud list price)
Amazon TrainiumTrainium3 (Trn3 UltraServer)144 GB HBM3e2.52 PFLOPS FP8 (AWS)Annapurna Labs designs; foundry not disclosedTrn3 not published; Trainium2 $2.235 per chip-hour (AWS Capacity Block)
Microsoft MaiaMaia 200216 GB HBM3eOver 10 PFLOPS FP4; over 5 PFLOPS FP8 (Microsoft)TSMC (3 nm)Not for sale or rent (used for Microsoft services)
Meta MTIAMTIA 300 (MTIA 400 next)216 GB HBM3E1.2 PFLOPS FP8 (as reported from Meta's roadmap)Meta with Broadcom; TSMC for earlier chipsNot for sale or rent (Meta internal use only)
AppleM5 Ultra (Mac Studio)Up to 512 GB unified memory, 1.2 TB/sNot published as TOPS (last figure: M4, 38 TOPS)Apple designs; TSMC makesMac Studio with M5 Ultra from $5,499
CerebrasWSE-3 (CS-3); CS-4 announced, shipping from Q3 202644 GB SRAM on the wafer, 21 PB/s125 PFLOPS per WSE-3; 250 per WSE-3 TurboCerebras designs; TSMC 5 nmCloud: gpt-oss-120b $0.35 in / $0.75 out per million tokens
GroqLPU (gen 1); NVIDIA Groq 3 LPX under licence230 MB SRAM per chip, 80 TB/s750 TOPS INT8 / 188 TFLOPS FP16 per chipGroq design; 14 nm (GlobalFoundries per press)Cloud: GPT OSS 120B $0.15 in / $0.60 out per million tokens
Huawei AscendAscend 910C; 950 series from 2026950DT: 144 GB own HBM, 4 TB/s950: 1 PFLOPS FP8 / 2 PFLOPS MXFP4HiSilicon; factory not disclosed (press: SMIC)Not published by the company

The same 16 sections for every brand

Learn the layout once and you can read any brand page. Every section has Simple, Deeper and Expert levels, one below the other.

  1. 1. At a glance
  2. 2. Company card
  3. 3. The story
  4. 4. The lineup
  5. 5. How it’s made
  6. 6. Where it’s made: factories and addresses
  7. 7. How it works
  8. 8. Specs explained
  9. 9. Official pricing
  10. 10. The software lock-in
  11. 11. Who buys it and why
  12. 12. Hidden in plain sight
  13. 13. Weak spots
  14. 14. India angle
  15. 15. What’s next
  16. 16. Sources

Chip words in plain English

The short list is below; the full glossary has every term we use.

GPU
Graphics processing unit. A chip with thousands of small cores that do many calculations at once, which is what AI training and running need.
Accelerator
Any chip built to speed up one kind of work, such as AI. GPUs, TPUs and LPUs are all AI accelerators.
Fabless
A chip company that designs chips but pays a foundry to manufacture them. NVIDIA, AMD and Apple are fabless.
Foundry
A company that manufactures chips for others, such as TSMC or Samsung Foundry.
Wafer
A thin disc of silicon on which hundreds of chips are made at once, before being cut apart.
Process node
The manufacturing generation used to make a chip, named like "4NP" or "3nm". Smaller usually means more transistors in the same space.
Die
One chip cut from a wafer. Big AI chips now join two dies in one package.
HBM
High-bandwidth memory. Memory chips stacked on top of each other and placed right beside the AI chip so data moves very fast.
Advanced packaging (CoWoS)
The step that joins the chip dies and HBM stacks on one base. CoWoS is TSMC’s version, and it is one of the tightest bottlenecks in AI supply.
FLOPS / petaflops
Floating-point operations per second: how many sums a chip does each second. A petaflop is a thousand trillion per second.
FP4 / FP8 / FP16
How many bits each number uses. Fewer bits means less precision but much more speed. Chip makers quote their biggest numbers at FP4.
Sparse vs dense
A sparse figure assumes half the numbers in a model are zero and can be skipped, so it is often about double the dense figure. Compare dense with dense.
Memory bandwidth
How fast data moves between memory and the chip, in terabytes per second. For running large models this is often the real limit.
NVLink / scale-up
A very fast link joining GPUs inside a server or rack so they act like one big GPU. NVLink is NVIDIA’s; other makers have their own.
TDP / power
The most power a chip is designed to draw, in watts. A whole AI rack can need well over 100 kilowatts.
Rack
A cabinet of servers. Modern AI systems are sold as whole racks, such as a rack of 72 GPUs.

In the news

Newest stories mentioning AI Chips, straight from the companies’ own newsrooms and the wider press. Links open the original.

All of today’s AI news →

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