How to read this page. Each section starts Simple, then goes to a Deep dive: stop wherever you have what you need. The small numbers are sources: click one to open the original document. Where the maker has not published a figure -- a price, a die size, a factory address -- this page says so rather than estimate it.
1.At a glance
SimpleStart here
TPU v4 is the Google chip whose own research paper directly benchmarks it against NVIDIA’s A100 GPU — and reports winning on both speed and power. Announced 18 May 2021 at Google I/O 1.
Deep diveThe technical detail
Google called it “the fastest system we’ve ever deployed,” with a single pod “deliver[ing] more than one exaflop” — a figure Google compared to “the computing power of 10 million laptops combined” 1.
2.Launch and history
SimpleStart here
TPU v4’s headline idea: instead of wiring chips together in one fixed pattern, use tiny mirrors to physically redirect light between chips, letting Google reshape the network on the fly for whatever job is running.
Deep diveThe technical detail
Google’s own 2023 paper states TPU v4 has been “deployed since 2020” — a year before the public I/O announcement — and describes it as Google’s fifth domain-specific chip architecture and third machine-learning supercomputer 2. The defining architectural change is optical circuit switches (OCS): mirror-based switches that dynamically reconfigure the interconnect topology between chips, described in both the paper and a dedicated April 2023 Google Cloud blog post 23.
3.What’s inside it
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TPU v4 links thousands of chips using optical circuit switches that cost less than 5% of the system’s price and use less than 3% of its power, according to Google’s own paper 2.
Deep diveThe technical detail
Interconnect topology moved from v2/v3’s 2D torus to a 3D mesh, reconfigurable into a true torus on supported slice shapes via the optical circuit switches 4. Google’s SparseCore units, a third-generation addition, accelerate recommendation-style “embedding” models 5 to 7 times over a general-purpose approach while using only about 5% of die area and power 2. Google does not publish a process node for TPU v4.
4.Full spec table
SimpleStart here
275 teraflops per chip, 32GB of HBM2 memory at 1,200 GB/s, and a 4,096-chip pod delivering over one exaflop 4.
Deep diveThe technical detail
| Spec | Google TPU v4 |
|---|
| Peak compute (per chip) | 275 teraflops (bf16 or int8) |
|---|
| Peak compute (per pod) | 1.1 exaflops |
|---|
| Memory | 32 GiB HBM2 per chip, 1,200 GB/s |
|---|
| Interconnect | 3D mesh, reconfigurable to torus via optical circuit switches |
|---|
| Pod size | 4,096 chips |
|---|
| All-reduce bandwidth | 1.1 PB/s per pod |
|---|
| Bisection bandwidth | 24 TB/s per pod |
|---|
| Power | 90 / 170 / 192 W (min/mean/max, measured) |
|---|
| Host interface | PCIe Gen3 x16 |
|---|
Figures per Google Cloud’s current TPU v4 documentation 4.
5.Where it’s made
SimpleStart here
Google does not disclose who manufactured TPU v4 or on what process node. No official source names a foundry for this generation.
Deep diveThe technical detail
As with earlier generations, no official Google or Broadcom material confirms a specific manufacturer for TPU v4. Google’s documented Broadcom manufacturing relationship is confirmed only from TPU v5 onward.
6.Which systems use it
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TPU v4 ran the largest publicly available machine-learning cluster in the world at the time — a 4,096-chip system in Oklahoma running at roughly 90% carbon-free energy 3.
Deep diveThe technical detail
Google’s own efficiency post names PaLM, LaMDA, MUM, Midjourney and the Allen Institute for AI as workloads run on this cluster 3. It remains available today as a legacy Cloud TPU option 5.
7.Official pricing
SimpleStart here
Google Cloud’s current pricing page lists TPU v4 as a legacy tier at $3.22/chip-hour for a pod allocation in us-central2, Oklahoma 5.
Deep diveThe technical detail
Checked September 2026, from Google Cloud’s own pricing page 5: TPU v4 pod allocations price at $3.22 per chip-hour, specifically tied to the us-central2 (Oklahoma) region where Google built its large TPU v4 cluster.
9.What came before, what came next
SimpleStart here
Came before: TPU v3. Came after: TPU v5e and TPU v5p, announced separately in late 2023 as two purpose-built variants — one for cost efficiency, one for large-scale training.
Deep diveThe technical detail
TPU v4 was the last generation Google shipped as a single, general-purpose design before splitting the fifth generation into v5e (cost-efficient) and v5p (large-scale training) — the same training/inference split logic Google would repeat more explicitly with TPU 8t and 8i years later.
10.Hidden in plain sight
SimpleStart here
Google’s own hardware paper directly names and benchmarks itself against a specific NVIDIA GPU — something chip makers rarely do in their own published research.
Deep diveThe technical detail
Vendor-authored hardware papers typically avoid naming competitors’ products directly, preferring vague “prior generation” comparisons. Google’s 2023 ISCA paper on TPU v4 does the opposite: it explicitly compares performance and power against NVIDIA’s A100 by name, and against a Graphcore IPU Bow system by name 2 — an unusually direct, publicly citable head-to-head from a hardware vendor’s own peer-reviewed research.